In this paper, a narrowband and highly linear Low Noise Amplifier (LNA) is designed and implemented on 180 nm CMOS technology, operating at a center frequency of 4.5 GHz. This LNA design is particularly suitable for modern communication systems and emerging 5G applications. For simulation and analysis, the 180 nm Generic Process Design Kit (GPDK) in Keysight's Advanced Design System (ADS) was utilized. To improve stability and gain, resistive feedback was chosen, while inductive source degeneration was employed to achieve better noise performance and linearity. The proposed design aims for a simple architecture, and its narrowband specifications are achieved through optimized input and output matching networks. The analysis showed that the designed LNA provides a gain of 14.1 dB, a minimum noise figure of 0.928 dB, an input 1-dB compression point (P1dB) of 0 dBm, and an input third-order intercept point (IIP3) of 4.942 dBm across a 360 MHz band. These results indicate excellent linearity and signal integrity, and show the design is competitive with relative studies. The novelty of this work lies in achieving high linearity and low noise with a notably simplified design, overcoming common trade-offs. Compared to recent state-of-the-art work, the proposed LNA offers superior linearity and a lower noise figure while maintaining a simple circuit topology.