TY  - JOUR
TI  - Design and Verification of Parity Checking Circuit Using HOL4 Theorem Proving
AU  - DENİZ, E.
AU  - AKSOY, K.
AU  - TAHAR, S.
AU  - ZEREN, Y.
JO  - Sigma Journal of Engineering and Natural Sciences
PY  - 2019
VL  - 10
SP  - 245
EP  - 252
DO  - 
ER  -